// ******************************************************************************
// Copyright     :  Copyright (C) 2020, Hisilicon Technologies Co. Ltd.
// File name     :  smf0_harden_reg_offset.h
// Project line  :  Platform And Key Technologies Development
// Department    :  CAD Development Department
// Author        :  xxx
// Version       :  1.0
// Date          :  2018/9/28
// Description   :  The description of xxx project
// Others        :  Generated automatically by nManager V5.1
// History       :  xxx 2020/12/25 10:33:43 Create file
// ******************************************************************************

#ifndef SMF0_HARDEN_REG_OFFSET_H
#define SMF0_HARDEN_REG_OFFSET_H

/* SMF0_HARDEN_NODE_CSR Base address of Module's Register */
#define CSR_SMF0_HARDEN_NODE_CSR_BASE                     (0x21F10000)

/******************************************************************************/
/*                      SMF0_HARDEN_NODE_CSR Registers' Definitions                            */
/******************************************************************************/

#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_SMF0_HARDEN_REG           (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x0)  /* SMF0_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_SMF1_HARDEN_REG           (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x4)  /* SMF1_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_STFTILE0_HARDEN_REG       (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x8)  /* STFTILE0_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_STFTILE1_HARDEN_REG       (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0xC)  /* STFTILE1_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_IPSURX_PETX_HARDEN_REG    (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x10) /* IPSURX_PETX_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_TS_HARDEN_REG             (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x14) /* TS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_0_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x18) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_1_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x1C) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_2_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x20) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_3_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x24) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_4_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x28) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_5_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x2C) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_6_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x30) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_7_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x34) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_8_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x38) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_9_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x3C) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_10_REG  (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x40) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_CRG_CFG_MAG_FC_SDS_HARDEN_11_REG  (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x44) /* MAG_FC_SDS_HARDEN CRG的控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_ICG_EN_MAG_FC_SDS_HARDEN_P0_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x48) /* FC PORT0 cfg */
#define CSR_SMF0_HARDEN_NODE_CSR_SRST_REQ_MAG_FC_SDS_HARDEN_P0_REG (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x4C) /* FC PORT0 cfg */
#define CSR_SMF0_HARDEN_NODE_CSR_ICG_EN_MAG_FC_SDS_HARDEN_P1_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x50) /* FC PORT1 cfg */
#define CSR_SMF0_HARDEN_NODE_CSR_SRST_REQ_MAG_FC_SDS_HARDEN_P1_REG (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x54) /* FC PORT1 cfg */
#define CSR_SMF0_HARDEN_NODE_CSR_ICG_EN_MAG_FC_SDS_HARDEN_P2_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x58) /* FC PORT2 cfg */
#define CSR_SMF0_HARDEN_NODE_CSR_SRST_REQ_MAG_FC_SDS_HARDEN_P2_REG (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x5C) /* FC PORT2 cfg */
#define CSR_SMF0_HARDEN_NODE_CSR_ICG_EN_MAG_FC_SDS_HARDEN_P3_REG   (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x60) /* FC PORT3 cfg */
#define CSR_SMF0_HARDEN_NODE_CSR_SRST_REQ_MAG_FC_SDS_HARDEN_P3_REG (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x64) /* FC PORT3 cfg */
#define CSR_SMF0_HARDEN_NODE_CSR_RING_STA_SMF0_HARDEN_REG          (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x68) /* RING_CRDT_STA */
#define CSR_SMF0_HARDEN_NODE_CSR_RING_STA_SMF1_HARDEN_REG          (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x6C) /* RING_CRDT_STA */
#define CSR_SMF0_HARDEN_NODE_CSR_RING_STA_STFTILE0_HARDEN_REG      (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x70) /* RING_CRDT_STA */
#define CSR_SMF0_HARDEN_NODE_CSR_RING_STA_STFTILE1_HARDEN_REG      (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x74) /* RING_CRDT_STA */
#define CSR_SMF0_HARDEN_NODE_CSR_RING_STA_IPSURXPETX_HARDEN_REG    (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x78) /* RING_CRDT_STA */
#define CSR_SMF0_HARDEN_NODE_CSR_RING_STA_TS_HARDEN_REG            (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x7C) /* RING_CRDT_STA */
#define CSR_SMF0_HARDEN_NODE_CSR_SMF0_POWER_CFG_REG                (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x80) /* SMF0 power控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_SMF0_POWER_ACK_REG                (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x84) /* SMF0 power ACK状态寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_SMF1_POWER_CFG_REG                (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x88) /* SMF1 power控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_SMF1_POWER_ACK_REG                (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x8C) /* SMF1 power ACK状态寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_TS_POWER_CFG_REG                  (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x90) /* TS power控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_TS_POWER_ACK_REG                  (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x94) /* TS power ACK状态寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_STFTILE0_POWER_CFG_0_REG          (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x98) /* STFTILE0 power控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_STFTILE0_POWER_CFG_1_REG          (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0x9C) /* STFTILE0 power控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_STFTILE0_POWER_ACK_REG            (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0xA0) /* STFTILE0 power ACK状态寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_STFTILE1_POWER_CFG_0_REG          (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0xA4) /* STFTILE1 power控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_STFTILE1_POWER_CFG_1_REG          (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0xA8) /* STFTILE1 power控制寄存器 */
#define CSR_SMF0_HARDEN_NODE_CSR_STFTILE1_POWER_ACK_REG            (CSR_SMF0_HARDEN_NODE_CSR_BASE + 0xAC) /* STFTILE1 power ACK状态寄存器 */

#endif // SMF0_HARDEN_REG_OFFSET_H
